Recently, according to advance of miniaturization of a size of a semiconductor device, accuracy becomes such severe that a gate electrode with a size of 0.1 μm or less must be worked with a size accuracy of 10% or less. For example, a size of a gate electrode is one of main factors determining an operation characteristic of a semiconductor device, a working size of the gate electrode is influenced by not only a working step of the gate electrode but also a step performed prior to the working step thereof, such as a film thickness of the gate electrode or size of a resist pattern serving as a mask applied during working. Therefore, even if gate electrodes are worked according to the same working step under the same processing condition, working sizes of the gate electrodes do not become the same value due to accumulation of fine fluctuations in respective steps, where a size fluctuation occurs in a certain range, for example, a size fluctuation of about 10 nm at 3σ occurs to 90 nm which is a target value of a working size of a gate electrode. Therefore, the size accuracy deteriorates, which results in decline of productivity.
A scheme for suppressing size fluctuation by predicting size fluctuation from examination data at respective steps and performing proper modification of a processing condition for a control process, has been proposed to overcome the problem.
For example, a method for modifying the processing condition for a control process is shown in Patent Document 1 (Japanese Patent Application Laid-Open Publication No. 2005-510083 (Domestic Publication after PCT International Publication)). In the Patent Document 1, a first process is performed on a semiconductor wafer, and integrated measurement data relating to the process is acquired. A method for specifying at least one error from the integrated measurement data and performing an adjusting process to a second process for compensating for the error has been disclosed.
Another example has been shown in Patent Document 2 (Japanese Patent Application Laid-Open Publication No. 2003-531491 (Domestic Publication after PCT International Publication)). In the Patent Document 2, a step of working a workpiece and a step of outputting a feature parameter from the measured feature parameter using a transistor model are described. A method using a step of predicting a wafer electric test using the output step, a step of detecting a process including a defect based upon the prediction value, and a step of correcting the process including a defect has been disclosed.
A method for controlling a size of a device isolation region according to a feedforward is described in Patent Document 3 (Japanese Patent Application Laid-Open Publication No. 2002-151465). In the Patent Document 3, a method in which a model equation of a step between surfaces of the device isolation region and an active region is generated, then, a cleaning time for removing an embedded oxide film is controlled by the model equation using film thickness measurement data measured after CMP (Chemical Mechanical Polishing), and as a result, the step is controlled to be constant, is disclosed.
On the other hand, in a recent lithographic technique, in order to respond to fineness of a wire width, a light source wavelength is shortened and resist material is changed along with the shortening. As shown in Non-Patent Document 1 (A. Yamaguchi, et al., “Proceedings of SPIE vol. 5375”, p. 468-476 (2004)), particularly in resist material responding to an ArF excimer laser of a light source wavelength of 193 nm (hereinafter, “ArF resist”), fluctuation of the wire width such as called “Line Edge Roughness (LER)” becomes significant. The fluctuation of the wire width is about 6 nm at 3σ. Therefore, in a size measurement of a wire width, even on the same wire, when wire widths at different portions are measured, a problem arises that sizes measured are different. Accordingly, in a size examining step in a manufacturing step of a semiconductor device using a resist pattern with large LER, a problem occurs that measurement accuracy for a size deteriorates. And, a method for measuring a fine wire width in a range of 0.1 μm or less with high accuracy and at a high speed is required.
Several methods for measuring a wire width have been proposed in these circumstances. One of the methods is a measuring method of a wire width using a critical dimension-scanning electron microscope (CD-SEM) most widely used currently. The feature of the CD-SEM is that an image with a high resolution can be acquired even if a wire width is 0.1 μm or less and any object to be measure can be measured because the CD-SEM uses an electron beam. It is generally known that the ArF resist is shrunk due to electron beam irradiation, and an amount of the shrink depends on an irradiation amount of electron beam. However, the latest CD-SEM has a function of minimizing the shrink amount for each object to be measured by automatization of measurement and a function (Rectangular Scan) of reducing a shrink amount by expanding a scan interval of electron beam (Rectangular Scan). The Rectangular Scan function allows acquisition of an image with a difference in magnification between a vertical direction and a horizontal direction by changing the scan interval of electron beam. The measuring method of a wire width based upon the CD-SEM has a feature that it is relatively fast and measurement with high accuracy can be performed to arbitrary object to be measured.
As another method, there is a method using scatterometry as shown in Non-Patent Document 2 (B. Cheung, et al., “Proceedings of SPIE vol. 5752”, p. 30-40 (2005)). This method acquires interference waveforms of light to a pattern having cyclic arrangement over a square region with a size of 50 μm or more. And, by comparing an interference waveform simulated from a structure model to be measured and an interference waveform acquired actually, a size of an object to be measured is measured in this method. The measuring method of a wire width using scatterometry has a feature that, for the structure model having a simple structure for simulation as described above and a restrictive pattern having cyclic arrangement over a square region with a size of 50 μm or more, measurement can be performed at a relatively high speed.
As still another method, there is a measuring method of a wire width by a Critical Dimension-Atomic Force Microscope (CD-AFM) using Atomic Force Microscope as shown in Non-Patent Document 3 (V. A. Ukraintsev, et. al., “Proceedings of SPIE vol. 5752”, p 127-139 (2005)). This method is a method for measuring a wire width using a fine probe to directly measure an object to be measure in a three-dimensional manner. And, since the object to be measured is directly measured, a three-dimensional structure of the object can be grasped. The accuracy of the measurement largely depends on a size of an object to be measured and a shape and a size of the probe.
As described above, in the manufacturing process of a semiconductor device, the methods for controlling a working size of a semiconductor device or the method for measuring a fine object to be measured with a high accuracy have been proposed.